The present invention relates generally to a digital-to-analog converter (DAC) cell, and more particularly to a DAC cell constructed from core devices.
Digital-to-analog conversion is a process for converting information from a digital signal into an analog signal such as a voltage or a current. The digital signal can usually be represented as a binary number. A binary number system represents numeric values using two symbols, typically 0 and 1. Binary numbers are characterized by having different weighting for each bit (or signal). For example, a four-bit binary number has a least significant bit (bit 0) and a most significant bit (bit 3) whereby each bit is twice the value of the next least significant bit. For example, bit 1 is twice the value of bit 0, and bit 2 is twice the value of bit 1.
FIG. 1 shows a conventional current-steering type single-bit DAC cell 100 which can be used to convert a digital signal to an analog equivalent. In this DAC cell 100, the transistors M1 and M2 are connected in series to increase the output impedance. The biasing voltages VB1 and VB2 are established so that the devices M1 and M2 collectively act as a current source that, upon the appropriate control by VB1 and VB2, will provide a constant current to the cell. The devices M3 and M4 act as steering transistors such that the current is directed to either the output (Iout) or to a complementary supply voltage (such as a ground or Vss) according to the state of a control signal A (and its complement). The control signal A may be generated externally by a digital input signal to be applied to the DAC cell. In practice, the output current from this cell would normally be directed to a resistive element to create a voltage.
In various chip designs, there are at least two sets of power supplies that provide different levels of power to different parts of the chip. For instance, a core voltage (Vddcore) is provided to a “core” of the chip so that the components of the core, usually small geometry devices, can operate under a relatively lower voltage without a breakdown. On the other hand, a relatively higher I/O voltage (Vddio) is provided for the circuit components that interact with external devices which are all operating at the higher voltage level. To realize a conventional DAC cell 100, the transistors M1 through M4 are input/output (I/O) devices designed to operate at higher voltages than the core voltage used internally on the integrated circuit. The core devices are generally small devices having a thinner gate oxide thickness (e.g., less than 3 nm) and a lower operating voltage (typically less than 2.5 volt) than the I/O devices. Accordingly the I/O devices can sustain higher voltages such as 2.5V or 3.3V and have a higher threshold voltage of about 0.6 to 0.7 volt, whereas core devices can only sustain up to 1.4 volt and their threshold voltages are about 0.4 volt. Thus in FIG. 1 the supply voltage Vddio is normally set at 2.5 or 3.3 volt to provide adequate operational and noise margins. The transistors M1, M2, M3 and M4 are all built in 2.5V/3.3V I/O devices. The transistors M1 and M2 are cascoded and properly biased by bias voltages VB1 and VB2 to produce a high output impedance.
In view of the foregoing, the DAC cells are normally operated at a high voltage of 2-3 volt for sufficient dynamic range and I/O devices are used to construct the DAC cell. As such, what is needed is a DAC cell comprised of core devices having an acceptable dynamic range and output impedance while using less integrated circuit area.